1. Field
The following generally relates to driver circuitry for performing high-speed data communication, and more particularly, to a low-voltage differential signaling (“LVDS”) system for such high speed data communication.
2. Related Art
Resulting from tremendous growth of the internet, data transfers have dramatically increased, in terms of both volume and speed, in all fields of communication. For example, data streams of transmissions for digitized video signals and color graphics may now require bandwidth at rates in excess of one gigabit per second (“Gbps”). As a result, an interface of a receiver and/or transmitter (collectively “transceiver”) for handling these transmissions has to be able to exchange (“i.e., send and/or receive”) data at such rates.
Today's interface typically employs a Low-Voltage Differential Signaling (“LVDS”) system. In general, the LVDS system includes two output terminals coupled to a load of the transceiver and circuitry for driving (“LVDS driver”) a differential-output voltage across the two terminals, which in turn, drives a current flow across the load. During transmission, the differential-output voltage swings between two voltage levels of opposite polarity, which represents digitally encoded data being transmitted. The swing in the voltage levels, in turn, causes the polarity of the current flow across the load, which forms the data streams being transmitted.
As the rate of transmission approaches and/or exceeds 1 Gbps, capacitance present at the load of the legacy LVDS system, including parasitic capacitances such as board line capacitance, can no longer be treated as being negligible. That is, this capacitance limits rise and fall times of the swing in the differential output voltage, thereby distorting the digitally encoded data being transmitted so as to vitiate the differences between the two voltage levels. As a result, the legacy LVDS system is limited as to the rate at which the LVDS system can transmit data.